1. Technical Field
The present invention relates to a D/A conversion circuit, an oscillator, an electronic apparatus, and a moving object.
2. Related Art
When a reduction in size and an increase in bits of a D/A converter are advanced in order to improve a resolving power of the converter, the area of a resistive element constituting a voltage dividing resistor hardly changes, but the number of switches each of which is constituted by a P-channel type MOS transistor and an N-channel type MOS transistor is increased, and thus the whole area is considerably increased. On the other hand, the P-channel type MOS transistor is used as a switch (PMOS switch) on a higher potential side than an intermediate potential, and the N-channel type MOS transistor is used as a switch (NMOS switch) on a lower potential side than the intermediate potential, and thus an area occupied by the switches can be halved, which allows a reduction in size and an increase in bits of the D/A converter to be achieved.
In this case, the number of switches selected in an on state in a PMOS switch group or an NMOS switch group is small, and most of the switches operate in an off state (gate electrodes of the PMOS switches are set to be in a high-potential state, and gate electrodes of the NMOS switches are set to be in a low potential). At this time, in the PMOS switch group, most of the gate electrodes are set to be in a high-potential state, the vicinity of most voltage dividing resistors close to the PMOS switches is set to be in a high-potential state. In addition, in the NMOS switch group, most of the gate electrodes are set to be in a low potential state, and thus the vicinity of most of the voltage dividing resistors close to the NMOS switches is set to be in a low-potential state.
When the inventors have carried out an experiment on a relationship between a resistance value of a resistor formed of polysilicon and potentials of wirings formed in wiring layers (ALA, ALB, ALC, and ALD disposed in ascending order of distance to the polysilicon layer) which are formed on the resistor, results as illustrated in FIG. 13 are obtained. In FIG. 13, a horizontal axis represents a potential of a wiring, and a vertical axis represents a resistance value of a resistor. From experiment results illustrated in FIG. 13, a resistance value becomes larger as the potential around the resistor becomes higher, and thus it can be understood that this tendency becomes more prominent as a distance between the resistor and the wiring becomes shorter.
Accordingly, in the D/A converter, it is considered that most of the voltage dividing resistors close to the PMOS switches have resistance values higher than their original resistance values because the vicinity thereof is set to be in a high-potential state, and most of the voltage dividing resistors close to the NMOS switches have resistance values lower than their original resistance values. For this reason, integral non-linearity (INL) of D/A conversion has a V shape with a central code as a boundary. In particular, when a resistive element constituting a voltage dividing resistor and a MOS switch are disposed to be as close as possible in order to achieve a reduction in size and an increase in bits, it can be understood that INL of D/A conversion has a V shape more prominently as illustrated in FIG. 14. Meanwhile, in FIG. 14, a horizontal axis represents a value in 16-bit digital codes which is input to a D/A converter, and a vertical axis represents INL.
As a solution of such a problem that a resistance value varies depending on a voltage difference, JP-A-2012-109535 proposes a resistive element capable of suppressing a variation in a resistance value by cancelling out a variation in a resistance value due to a voltage difference with respect to a semiconductor substrate in the vicinity of a resistive element layer, by a first conductive layer and a second conductive layer that cover at least one of a lower portion and an upper layer of the resistive element layer of which both ends are biased.
However, the resistive element disclosed in JP-A-2012-109535 cannot be used in a small and high-bit D/A converter because the layout area is increased by portions of the first conductive layer and the second conductive layer. In addition, in order to realize the resistive element disclosed in JP-A-2012-109535, it is necessary to form the first conductive layer or the second conductive layer, and thus a manufacturing cost is increased. In some cases, a manufacturing process may be required to be developed, and thus the application thereof cannot be easily performed.